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Chapter 1: ML628 Board Features and Operation
USB to UART Bridge
[ Figure 1-2 , callout 20 ]
Communications between the ML628 board and a host computer are through a USB cable
connected to J9. Control is provided by U26, a USB to UART bridge (Silicon Laboratories
CP2103). Table 1-21 lists the pin assignments and signals for the USB connector J9.
Table 1-21:
USB Type B Connector Pin Assignments and Signals
J9 Pin
1
2
3
4
Signal Name
VBUS
USB_DATA_N
USB_DATA_P
GROUND
Description
+5V into the CP2103 USB to UART bridge at U26.
Used to sense USB network connection.
Bidirectional differential serial data (N-side)
Bidirectional differential serial data (P-side)
Signal ground
The CP2103 supports an IO voltage range of 1.8V to 2.5V on the ML628 board. The
connections between the FPGA and CP2103 should use the LVCMOS25 IO standard.
UART IP (for example, Xilinx? XPS UART Lite) must be implemented in the FPGA fabric.
The FPGA supports the USB to UART bridge using four signal pins:
?
?
?
?
Transmit (TX)
Receive (RX)
Request to Send (RTS)
Clear to Send (CTS)
Connections of these signals between the FPGA and the CP2103 at U26 are listed in
Table 1-22 .
Table 1-22:
FPGA to U26 (CP2103 USB to UART Bridge) Connections
FPGA Pin
E27
F27
B29
C29
FPGA Function
RTS, output
CTS, input
TX, data out
RX, data in
Net Name
USB_CTS
USB_RTS
USB_RX
USB_TX
U26 Pin
22
23
24
25
U26 Function
CTS, input
RTS, output
RXD, data in
TXD, data out
The bridge device also provides as many as 4 GPIO signals that can be defined by the user
for status and control information ( Table 1-23 ).
Table 1-23:
CP2103 USB to UART Bridge User GPIO
FPGA Pin
E28
F28
M27
N27
Net Name
USB_GPIO0
USB_GPIO1
USB_GPIO2
USB_GPIO3
U26 Pin
19
18
17
16
A royalty-free software driver named Virtual COM Port (VCP) is available from Silicon
Laboratories. This driver permits the CP2103 USB to UART bridge to appear as a COM
38
www.xilinx.com
ML628 Board User Guide
UG771 (v1.1) February 19, 2014
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